DS28DG02: 2Kb SPI EEPROM with PIO, RTC, Reset, Battery Monitor, and Watchdog
Power-On Default for PIO Read Inversion (PIO8 to PIO11), PIO Output Type and Output Mode
ADDR
10Fh
b7
POTM
b6
POT3
b5
POT2
b4
POT1
b3
PIM11
b2
PIM10
b1
PIM9
b0
PIM8
There is general read and write access to this address. Factory default: 80h. The contents of this register are
automatically transferred to address 125h when the device powers up.
BIT DESCRIPTION
PIMn: PIO Power-On
Default Read-Inversion
POT1: Power-On
Default Output Type
POT2: Power-On
Default Output Type
POT3: Power-On
Default Output Type
POTM: Power-On
Default Output Mode
BIT(S)
b0 to b3
b4
b5
b6
b7
DEFINITION
Power-on default state of the read-inversion bit of PIO8 to PIO11. PIM8
applies to PIO8, etc.
Legend : 0 ? no inversion; 1 ? inversion
Power-on default output type of PIO0 to PIO3;
Legend : 0 ? push-pull; 1 ? open drain
Power-on default output type of PIO4 to PIO7;
Legend : 0 ? push-pull; 1 ? open drain
Power-on default output type of PIO8 to PIO11;
Legend : 0 ? push-pull; 1 ? open drain
Power-on default output mode of PIO0 to PIO11;
Legend : 0 ? low-current, simultaneous switching; 1 ? high-current,
sequential switching
Unique Registration Number (118h to 11Fh)
Each DS28DG02 has a unique registration number that is 64 bits long, as shown in Figure 3. The registration
number begins with the Cyclic Redundancy Check (CRC) of the subsequent 56 bits at address 118h followed by
the 48-bit serial number (MS-byte at the lower address) and ends at address 11Fh with the family code. This CRC
is generated using the a polynomial X 8 + X 5 + X 4 + 1. Additional information about CRCs is available in Application
Note 27 .
Figure 3. 64-Bit Registration Number
Address 118h
8-Bit CRC Code
Addresses 119h (MSB) to 11Eh (LSB)
48-Bit Serial Number
Address 11Fh
8-Bit Family Code (70h)
MSB
LSB
MSB
LSB
MSB
LSB
PIO Output State
ADDR
120h
121h
b7
OV7
X
b6
OV6
X
b5
OV5
X
b4
OV4
X
b3
OV3
OV11
b2
OV2
OV10
b1
OV1
OV9
b0
OV0
OV8
There is general read and write access to these addresses. These registers are automatically loaded with data
from address 10Ah/10Bh when the device powers up.
BIT DESCRIPTION
OVn: PIO Output State
X: (Not Assigned)
BIT(S)
DEFINITION
Output state of PIO0 to PIO11. OV0 applies to PIO0, etc.
Legend : 0 ? LOW; 1 ? HIGH if PIO direction is output
Reserved for future use.
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